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» Minimization and Partitioning Method Reducing Input Sets
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BMCBI
2005
190views more  BMCBI 2005»
14 years 9 months ago
An Entropy-based gene selection method for cancer classification using microarray data
Background: Accurate diagnosis of cancer subtypes remains a challenging problem. Building classifiers based on gene expression data is a promising approach; yet the selection of n...
Xiaoxing Liu, Arun Krishnan, Adrian Mondry
ASYNC
1998
IEEE
100views Hardware» more  ASYNC 1998»
15 years 1 months ago
An Implicit Method for Hazard-Free Two-Level Logic Minimization
None of the available minimizers for exact 2-level hazard-free logic minimization can synthesize very large circuits. This limitation has forced researchers to resort to heuristic...
Michael Theobald, Steven M. Nowick
DFT
2006
IEEE
105views VLSI» more  DFT 2006»
15 years 3 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
DSD
2009
IEEE
71views Hardware» more  DSD 2009»
15 years 1 months ago
Representation of Incompletely Specified Index Generation Functions Using Minimal Number of Compound Variables
This paper shows a method to reduce the number of input variables to represent incompletely specified index generation functions. A compound variable is generated by EXORing the o...
Tsutomu Sasao, Takaaki Nakamura, Munehiro Matsuura
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
15 years 10 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...