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INFOCOM
2006
IEEE
15 years 7 months ago
Designing Low Cost Networks with Short Routes and Low Congestion
— We design network topologies and routing strategies which optimize several measures simultaneously: low cost, small routing diameter , bounded degree and low congestion. This s...
Van Nguyen, Charles U. Martel
MICRO
2006
IEEE
117views Hardware» more  MICRO 2006»
15 years 7 months ago
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Dynamic software bug detection tools are commonly used because they leverage run-time information. However, they suffer from a fundamental limitation, the Path Coverage Problem: t...
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep T...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 7 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
15 years 6 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
15 years 6 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...