Abstract— This paper reports on our efforts to link an industrial state-of-the-art modelling tool to academic state-of-the-art analysis algorithms. In a nutshell, we enable timed...
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Abstract. This article deals with performance verifications of architecture models of real-time embedded systems. We focus on models verified with the real-time scheduling theory...
Alain Plantec, Frank Singhoff, Pierre Dissaux, J&e...
We present an approach for checking code against rich specifications, based on existing work that consists of encoding the program in a relational logic and using a constraint sol...
: This paper presents a Unified Modeling Language (UML) model for VisualAge Generator (VG) business-oriented applications. This model was defined to bridge between two different mo...
Shiri Davidson, Mila Keren, Sara Porat, Gabi Zodik