Sciweavers

575 search results - page 45 / 115
» Model Checking Restricted Sets of Timed Paths
Sort
View
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
15 years 8 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
ISMVL
2003
IEEE
85views Hardware» more  ISMVL 2003»
15 years 5 months ago
On the Average Path Length in Decision Diagrams of Multiple-Valued Functions
We consider the path length in decision diagrams for multiple-valued functions. This is an important measure of a decision diagram, since this models the time needed to evaluate t...
Jon T. Butler, Tsutomu Sasao
COLT
2008
Springer
15 years 1 months ago
Learning Acyclic Probabilistic Circuits Using Test Paths
We define a model of learning probabilistic acyclic circuits using value injection queries, in which an arbitrary subset of wires is set to fixed values, and the value on the sing...
Dana Angluin, James Aspnes, Jiang Chen, David Eise...
TMI
2010
175views more  TMI 2010»
14 years 6 months ago
Spatially Adaptive Mixture Modeling for Analysis of fMRI Time Series
Within-subject analysis in fMRI essentially addresses two problems, the detection of brain regions eliciting evoked activity and the estimation of the underlying dynamics. In [1, 2...
Thomas Vincent, Laurent Risser, Philippe Ciuciu
VTS
2000
IEEE
167views Hardware» more  VTS 2000»
15 years 4 months ago
Path Selection for Delay Testing of Deep Sub-Micron Devices Using Statistical Performance Sensitivity Analysis
The performance of deep sub-micron designs can be affected by various parametric variations, manufacturing defects, noise or even modeling errors that are all statistical in natur...
Jing-Jia Liou, Kwang-Ting Cheng, Deb Aditya Mukher...