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121
Voted
RTCSA
1999
IEEE
15 years 8 months ago
1999
IEEE
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
123
Voted
FPGA
1998
ACM
15 years 8 months ago
1998
ACM
The goal of this paper is to perform a timing optimization of a circuit described by a network of cells on a target structure whose connection delays have discrete values following...
138
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HICSS
1997
IEEE
15 years 8 months ago
1997
IEEE
We describe an environment to produce traces representing significant workloads for a shared-bus shared-memory multiprocessor used as a general-purpose multitasking machine, wher...
125
Voted
VLDB
1998
ACM
15 years 8 months ago
1998
ACM
Currently the key problems of query optimization are extensibility imposed by object-relational technology, as well as query complexity caused by forthcoming applications, such as...
136
Voted
HICSS
1994
IEEE
15 years 7 months ago
1994
IEEE
The development of accurate trace-driven simulation models has become a key activity in the design of new high-performance computer systems. Tracedriven simulation is fast) enabli...