366 search results - page 27 / 74 » Model-checking higher-order functions |
ISVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
105
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ICRE
1998
IEEE
15 years 4 months ago
1998
IEEE
Model checking is shown to be an effective tool in validating the behavior of a fault tolerant embedded spacecraft controller. The case study presented here at by judiciously abst...
103
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APSEC
1999
IEEE
15 years 4 months ago
1999
IEEE
For the practical development of provably correct software for embedded systems the close integration of CASE tools and verification tools is required. This paper describes the co...
102
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CAV
1998
Springer
15 years 4 months ago
1998
Springer
bstract description of state machines (ASMs), in which data and data operations are d using abstract sort and uninterpreted function symbols. ASMs are suitable for describing Regis...
MJ
2006
14 years 11 months ago
2006
In this paper, we describe a hybrid tool for hardware formal verification that links the HOL (higher-order logic) theorem prover and (multiway decision graphs) model checker. Our ...