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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
15 years 6 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
CGO
2010
IEEE
15 years 4 months ago
Exploiting statistical correlations for proactive prediction of program behaviors
This paper presents a finding and a technique on program behavior prediction. The finding is that surprisingly strong statistical correlations exist among the behaviors of diffe...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Feng Mao, ...
ISPASS
2010
IEEE
15 years 4 months ago
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
Karthik Ganesan, Jungho Jo, Lizy K. John
SI3D
2010
ACM
15 years 4 months ago
Interactive volume caustics in single-scattering media
Volume caustics are intricate illumination patterns formed by light first interacting with a specular surface and subsequently being scattered inside a participating medium. Alth...
Wei Hu, Zhao Dong, Ivo Ihrke, Thorsten Grosch, Guo...
HYBRID
2010
Springer
15 years 4 months ago
Real-time scheduling of mixture-of-experts systems with limited resources
Mixture-of-Experts (MoE) systems solve intricate problems by combining results generated independently by multiple computational models (the “experts”). Given an instance of a...
Prapaporn Rattanatamrong, José A. B. Fortes
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