It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Compiler technology for multimedia extensions must effectively utilize not only the SIMD compute engines but also the various levels of the memory hierarchy: superword registers,...
Chun Chen, Jaewook Shin, Shiva Kintali, Jacqueline...
Tile-based rendering (also called chunk rendering or bucket rendering) is a promising technique for low-power, 3D graphics platforms. This technique decomposes a scene into smalle...
Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassil...
This paper presents a compiler methodology for memoryaware mapping on 2-Dimensional coarse-grained reconfigurable architectures that aims in improving the mapped applications’ p...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
— Compared with a single level Hamming associative memory, a simple model based on uniform random noise analysis has proved a twolevel decoupled Hamming network to be an efficie...