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MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
15 years 3 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
15 years 3 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
LCTRTS
2005
Springer
15 years 3 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
SPAA
2004
ACM
15 years 3 months ago
Fighting against two adversaries: page migration in dynamic networks
Page migration is one of the fundamental subproblems in the framework of data management in networks. It occurs in a distributed network of processors sharing one indivisible memo...
Marcin Bienkowski, Miroslaw Korzeniowski, Friedhel...
GSEM
2004
Springer
15 years 3 months ago
The Grid-Occam Project
Occam is a parallel processing language designed by a team at INMOS in conjunction with the design of the transputer processor, and based on Sir T. Hoare's ideas of Communica...
Peter Tröger, Martin von Löwis, Andreas ...