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PC
2011
318views Management» more  PC 2011»
14 years 6 months ago
High-performance message-passing over generic Ethernet hardware with Open-MX
In the last decade, cluster computing has become the most popular high-performance computing architecture. Although numerous technological innovations have been proposed to improv...
Brice Goglin
TSE
1998
116views more  TSE 1998»
14 years 10 months ago
A Framework-Based Approach to the Development of Network-Aware Applications
— Modern networks provide a QoS (quality of service) model to go beyond best-effort services, but current QoS models are oriented towards low-level network parameters (e.g., band...
Jürg Bolliger, Thomas R. Gross
ACSD
2003
IEEE
103views Hardware» more  ACSD 2003»
15 years 4 months ago
Design Validation of ZCSP with SPIN
— We consider the problem of specifying a model of the Zero Copy Secured Protocol for the purpose of LTL verification with the SPIN Model Checker. ZCSP is based on Direct Memory...
Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou D...
PADS
2003
ACM
15 years 4 months ago
Hybrid Packet/Fluid Flow Network Simulation
Packet-level discrete-event network simulators use an event to model the movement of each packet in the network. This results in accurate models, but requires that many events are...
Cameron Kiddle, Rob Simmonds, Carey L. Williamson,...
CODES
2007
IEEE
15 years 3 months ago
Synchronization after design refinements with sensitive delay elements
The synchronous computational model with its simple computation and communication mechanism makes it easy to describe, simulate and formally verify synchronous embedded systems at...
Tarvo Raudvere, Ingo Sander, Axel Jantsch