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» Modeling Timed Concurrent Systems
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PPOPP
2006
ACM
15 years 7 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
AAAI
2008
15 years 2 months ago
Querying Sequential and Concurrent Horn Transaction Logic Programs Using Tabling Techniques
In this poster we describe the tabling techniques for Sequential and Concurrent Horn Transaction Logic. Horn Transaction Logic is an extension of classical logic programming with ...
Paul Fodor
CAV
1994
Springer
111views Hardware» more  CAV 1994»
15 years 5 months ago
Automatic Verification of Timed Circuits
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on abehavioralseman...
Tomas Rokicki, Chris J. Myers
106
Voted
ICSE
2008
IEEE-ACM
16 years 2 months ago
A study of student strategies for the corrective maintenance of concurrent software
Graduates of computer science degree programs are increasingly being asked to maintain large, multi-threaded software systems; however, the maintenance of such systems is typicall...
Scott D. Fleming, Eileen Kraemer, R. E. Kurt Stire...
OOPSLA
2009
Springer
15 years 8 months ago
A concurrent dynamic analysis framework for multicore hardware
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...