Sciweavers

105 search results - page 6 / 21
» Modeling and Simulation
Sort
View
ICCAD
2008
IEEE
151views Hardware» more  ICCAD 2008»
15 years 10 months ago
Race analysis for SystemC using model checking
—SystemC is a system-level modeling language that offers a wide range of features to describe concurrent systems rent levels of abstraction. The SystemC standard permits simulato...
Nicolas Blanc, Daniel Kroening
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
15 years 10 months ago
Fast and accurate transaction level models using result oriented modeling
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
Gunar Schirner, Rainer Dömer
ICCAD
1994
IEEE
87views Hardware» more  ICCAD 1994»
15 years 5 months ago
On testing delay faults in macro-based combinational circuits
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...
Irith Pomeranz, Sudhakar M. Reddy
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
15 years 10 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
15 years 5 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...