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ICCD
2004
IEEE
129views Hardware» more  ICCD 2004»
15 years 9 months ago
Cache Array Architecture Optimization at Deep Submicron Technologies
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
Annie (Yujuan) Zeng, Kenneth Rose, Ronald J. Gutma...
105
Voted
EMISA
2009
Springer
15 years 7 months ago
A Survival Analysis of Application Life Spans based on Enterprise Architecture Models
Abstract: Modern enterprises face the challenge to survive in an ever changing environment. One commonly accepted means to address this challenge and further enhance survivability ...
Stephan Aier, Sabine Buckl, Ulrik Franke, Bettina ...
IPPS
2007
IEEE
15 years 6 months ago
Model-Guided Empirical Optimization for Multimedia Extension Architectures: A Case Study
Compiler technology for multimedia extensions must effectively utilize not only the SIMD compute engines but also the various levels of the memory hierarchy: superword registers,...
Chun Chen, Jaewook Shin, Shiva Kintali, Jacqueline...
INFOCOM
2012
IEEE
13 years 3 months ago
Data gathering in networks of bacteria colonies: Collective sensing and relaying using molecular communication
Abstract—The prospect of new biological and industrial applications that require communication in micro-scale, encourages research on the design of bio-compatible communication n...
Arash Einolghozati, Mohsen Sardari, Ahmad Beirami,...
IDEAS
2003
IEEE
73views Database» more  IDEAS 2003»
15 years 5 months ago
Operations on Metamodels in the Context of a UML-Based Metamodeling Architecture
In the context of information system engineering, we propose a four-layer metamodeling architecture with a comprehensive set of operations on metamodels. Our architecture enables ...
Marie-Noëlle Terrasse, George Becker, Marinet...