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DAC
2007
ACM
16 years 8 months ago
Scan Test Planning for Power Reduction
Many STUMPS architectures found in current chip designs allow disabling of individual scan chains for debug and diagnosis. In a recent paper it has been shown that this feature can...
Christian G. Zoellin, Hans-Joachim Wunderlich, Jen...
269
Voted
ICCV
2007
IEEE
16 years 1 months ago
PEYE: Toward a Visual Motion Based Perceptual Interface for Mobile Devices
We present the architecture and algorithm design of a visual motion based perceptual interface for mobile devices with cameras. In addition to motion vector, we use the term “vis...
Gang Hua, Ting-Yi Yang, Srinath Vasireddy
215
Voted
HIPEAC
2009
Springer
15 years 11 months ago
Deriving Efficient Data Movement from Decoupled Access/Execute Specifications
Abstract. On multi-core architectures with software-managed memories, effectively orchestrating data movement is essential to performance, but is tedious and error-prone. In this p...
Lee W. Howes, Anton Lokhmotov, Alastair F. Donalds...
JSW
2008
127views more  JSW 2008»
15 years 7 months ago
Design and Implementation of a Version Management System for Reference Modeling
The central idea in reference modeling is the reutilization of the business knowledge contained in a reference model. The user's task in reference model-based construction is ...
Oliver Thomas
212
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TCAD
2002
158views more  TCAD 2002»
15 years 7 months ago
Static power modeling of 32-bit microprocessors
The paper presents a novel strategy aimed at modelling instruction energy consumption of 32-bits microprocessors. Differently from former approaches, the proposed instruction-level...
Carlo Brandolese, Fabio Salice, William Fornaciari...