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» Modelling and Verifying of e-Commerce Systems
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JSA
2008
131views more  JSA 2008»
15 years 3 months ago
Formal verification of ASMs using MDGs
We present a framework for the formal verification of abstract state machine (ASM) designs using the multiway decision graphs (MDG) tool. ASM is a state based language for describ...
Amjad Gawanmeh, Sofiène Tahar, Kirsten Wint...
DATE
2003
IEEE
82views Hardware» more  DATE 2003»
15 years 9 months ago
A Solution for Hardware Emulation of Non Volatile Memory Macrocells
More and more the system verification makes use of hardware emulation techniques that allow a speed up in simulation performance up to thousand times. Typically, a design is comp...
Alessandro Pirola
IAJIT
2008
118views more  IAJIT 2008»
15 years 4 months ago
Integration of the Association Ends within UML State Diagrams
: UML currently still lacks a rigorously defined semantics for its models, which makes formally analyzing a model and verifying its properties extremely difficult. To remedy that, ...
Thouraya Bouabana-Tebibel, Mounira Belmesk
BMCBI
2007
148views more  BMCBI 2007»
15 years 4 months ago
Toward the automated generation of genome-scale metabolic networks in the SEED
Background: Current methods for the automated generation of genome-scale metabolic networks focus on genome annotation and preliminary biochemical reaction network assembly, but d...
Matthew DeJongh, Kevin Formsma, Paul Boillot, John...
ESOP
2010
Springer
16 years 1 months ago
Faulty Logic: Reasoning about Fault Tolerant Programs
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
Matthew L. Meola and David Walker