1901 search results - page 104 / 381 » Models and Scheduling Mechanisms for Global Computing Applic... |
ICRA
2010
IEEE
15 years 3 days ago
2010
IEEE
— After briefly summarizing the mechanical design of the two joint prototypes for the new DLR variable compliance arm, the paper exemplifies the dynamic modelling of one of the...
111
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HPCA
2008
IEEE
16 years 2 months ago
2008
IEEE
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
103
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ICS
2009
Tsinghua U.
15 years 8 months ago
2009
Tsinghua U.
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
125
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HPCA
1997
IEEE
15 years 5 months ago
1997
IEEE
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
117
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ICS
2001
Tsinghua U.
15 years 6 months ago
2001
Tsinghua U.
An accurate, tractable, analytic cache model for time-shared systems is presented, which estimates the overall cache missrate of a multiprocessing system with any cache size and t...