77 search results - page 2 / 16 » Modifying Min-Cut for Hardware and Software Functional Parti... |
132
Voted
FPL
2006
Springer
15 years 4 months ago
2006
Springer
A novel framework shows the potential of FPGA-based systems for increasing fault-tolerance and flexibility by placing functionality onto free hardware (HW) or software (SW) resour...
127
Voted
IPPS
2010
IEEE
14 years 10 months ago
2010
IEEE
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
129
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ISPD
2007
ACM
15 years 2 months ago
2007
ACM
In this paper, we derive the X-half-perimeter wirelength (XHPWL) model for X-architecture placement and explore the effects of three different wire models on X-architecture plac...
150
Voted
TACAS
2001
Springer
15 years 5 months ago
2001
Springer
In previous work we have developed and prototyped a silicon compiler which translates a functional language (SAFL) into hardware. Here we present a SAFL-level program transformati...
126
Voted
DAC
1996
ACM
15 years 5 months ago
1996
ACM
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...