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JSS
2006
104views more  JSS 2006»
13 years 6 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
ISCAS
2005
IEEE
173views Hardware» more  ISCAS 2005»
14 years 1 days ago
Slack-time aware routing in NoC systems
—Efficient routing schemes are essential if Network on Chip (NoC) architectures are to be used for implementing multi-core systems for real-time multi-media applications. These s...
Daniel Andreasson, Shashi Kumar
VTC
2010
IEEE
201views Communications» more  VTC 2010»
13 years 4 months ago
iTETRIS: Adaptation of ITS Technologies for Large Scale Integrated Simulation
1 —the European Union (EU) Framework Program 7 (FP7) funded project, iTETRIS [1] (An Integrated Wireless and Traffic Platform for Real-Time Road Traffic Management Solutions) tar...
Vineet Kumar, Lan Lin, Daniel Krajzewicz, Fatma Hr...
MOBIHOC
2008
ACM
14 years 6 months ago
On the need for bidirectional coupling of road traffic microsimulation and network simulation
Simulation of network protocol behavior in Vehicular Ad Hoc Network (VANET) scenarios is strongly demanded for evaluating the applicability of developed network protocols. In this...
Christoph Sommer, Zheng Yao, Reinhard German, Falk...
SIGMOBILE
2008
98views more  SIGMOBILE 2008»
13 years 6 months ago
TraNS: realistic joint traffic and network simulator for VANETs
Realistic simulation is a necessary tool for proper evaluation of newly developed protocols for Vehicular Ad Hoc Networks (VANETs). Several recent efforts focused on achieving thi...
Michal Piórkowski, Maxim Raya, A. Lezama Lu...