Sciweavers

626 search results - page 35 / 126
» Multi-modular Associative Memory
Sort
View
MICRO
2009
IEEE
121views Hardware» more  MICRO 2009»
15 years 4 months ago
Improving memory bank-level parallelism in the presence of prefetching
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N...
IPPS
2007
IEEE
15 years 4 months ago
A Key-based Adaptive Transactional Memory Executor
Software transactional memory systems enable a programmer to easily write concurrent data structures such as lists, trees, hashtables, and graphs, where non-conflicting operation...
Tongxin Bai, Xipeng Shen, Chengliang Zhang, Willia...
ROBOCOMM
2007
IEEE
15 years 4 months ago
Shared memories: a trail-based coordination server for robot teams
Abstract—Robust, dependable and concise coordination between members of a robot team is a critical ingredient of any such collective activity. Depending on the availability and t...
George Roussos, Dikaios Papadogkonas, J. Taylor, D...
JCISE
2002
117views more  JCISE 2002»
14 years 9 months ago
Memory Analysis of Solid Model Representations for Heterogeneous Objects
Methods to represent and exchange parts consisting of Functionally Graded Material (FGM) for Solid Freeform Fabrication (SFF) with Local Composition Control (LCC) are evaluated ba...
Todd R. Jackson, Wonjoon Cho, Nicholas M. Patrikal...
HIPC
2004
Springer
15 years 3 months ago
A Shared Memory Dispatching Approach for Partially Clairvoyant Schedulers
It is well known that in a typical real-time system, certain parameters, such as the execution time of a job, are not fixed numbers. In such systems, it is common to characterize ...
K. Subramani, Kiran Yellajyosula