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DATE
2009
IEEE
98views Hardware» more  DATE 2009»
15 years 4 months ago
A real-time application design methodology for MPSoCs
This paper presents a novel technique for the modeling, simulation, and analysis of real-time applications on MultiProcessor Systems-on-Chip (MPSoCs). This technique is based on a...
Giovanni Beltrame, Luca Fossati, Donatella Sciuto
SRDS
2003
IEEE
15 years 2 months ago
Transparent Fault-Tolerant Java Virtual Machine
Replication is one of the prominent approaches for obtaining fault tolerance. Implementing replication on commodity hardware and in a transparent fashion, i.e., without changing t...
Roy Friedman, Alon Kama
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
15 years 3 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...
DAC
2008
ACM
15 years 10 months ago
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
Zhen Zhang, Alain Greiner, Sami Taktak
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
15 years 4 months ago
HW/SW methodologies for synchronization in FPGA multiprocessors
Modern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyp...
Antonino Tumeo, Christian Pilato, Gianluca Palermo...