395 search results - page 40 / 79 » Multilevel Circuit Partitioning |
JSA
2006
14 years 9 months ago
2006
A NULL Cycle Reduction (NCR) technique is developed to increase the throughput of NULL Convention Logic systems, by reducing the time required to flush complete DATA wavefronts, c...
ICCD
2000
IEEE
15 years 2 months ago
2000
IEEE
This paper describes the application of binary and multivalued SPFD-based wire removal techniques for circuit implementations utilizing networks of PLAs. It has been shown that a ...
DAC
1996
ACM
15 years 1 months ago
1996
ACM
We offer a technique to partition a centralized control-flow graph to obtain distributed control in the context of asynchronous highlevel synthesis. The technique targets Huffman-...
DAC
1989
ACM
15 years 1 months ago
1989
ACM
We present a new 0 (n2) heuristic for hypergraph min-cut bipartitioning, an important problem in circuit placement. Fastest previous methods for this problem are O(n2 log n). Our ...
GECCO
2003
Springer
15 years 3 months ago
2003
Springer
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...