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ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
15 years 9 months ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...
GLVLSI
2007
IEEE
173views VLSI» more  GLVLSI 2007»
15 years 5 months ago
Modeling and estimating leakage current in series-parallel CMOS networks
This paper reviews the modeling of subthreshold leakage current and proposes an improved model for general series-parallel CMOS networks. The presence of on-switches in off-networ...
Paulo F. Butzen, André Inácio Reis, ...
CODES
2007
IEEE
15 years 11 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
IJHPCA
2008
131views more  IJHPCA 2008»
15 years 4 months ago
De Novo Ultrascale Atomistic Simulations On High-End Parallel Supercomputers
We present a de novo hierarchical simulation framework for first-principles based predictive simulations of materials and their validation on high-end parallel supercomputers and ...
Aiichiro Nakano, Rajiv K. Kalia, Ken-ichi Nomura, ...
IJAMC
2010
134views more  IJAMC 2010»
15 years 3 months ago
HyperVerse: simulation and testbed reconciled
—When dealing with dynamic large-scale topologies such as those underlying peer-to-peer (P2P) distributed virtual environments (DVE), one inescapably reaches the point where eith...
Jean Botev, Markus Esch, Hermann Schloss, Ingo Sch...