1740 search results - page 38 / 348 » Multiprocessor performance estimation using hybrid simulatio... |
135
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VLSID
2009
IEEE
16 years 4 months ago
2009
IEEE
The current paradigm of using Cu interconnects for on-chip global communication is rapidly becoming a serious performance bottleneck in ultra-deep submicron (UDSM) technologies. C...
128
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CDES
2006
15 years 5 months ago
2006
- Error detection plays an important role in fault-tolerant computer systems. Two primary parameters concerned for error detection are the latency and coverage. In this paper, a ne...
154
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JSA
2007
15 years 3 months ago
2007
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
153
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DAC
1997
ACM
15 years 8 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
141
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ISER
2004
Springer
15 years 9 months ago
2004
Springer
Legged robots display a characteristically periodic motion. Measuring and tracking this motion has traditionally been performed using general inertial measurement techniques. While...