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129
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IPPS
2000
IEEE
15 years 8 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
180
Voted
ICDCS
1996
IEEE
15 years 8 months ago
Dynamic Scheduling Strategies for Shared-memory Multiprocessors
Efficiently scheduling parallel tasks on to the processors of a shared-memory multiprocessor is critical to achieving high performance. Given perfect information at compile-time, ...
Babak Hamidzadeh, David J. Lilja
LSGRID
2004
Springer
15 years 9 months ago
Distributed Cell Biology Simulations with E-Cell System
Many useful applications of simulation in computational cell biology, e.g. kinetic parameter estimation, Metabolic Control Analysis (MCA), and bifurcation analysis, require a large...
Masahiro Sugimoto, Kouichi Takahashi, Tomoya Kitay...
SC
2009
ACM
15 years 11 months ago
A case for integrated processor-cache partitioning in chip multiprocessors
Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating sy...
Shekhar Srikantaiah, Reetuparna Das, Asit K. Mishr...
JSSPP
2009
Springer
15 years 10 months ago
Competitive Two-Level Adaptive Scheduling Using Resource Augmentation
Abstract. As multi-core processors proliferate, it has become more important than ever to ensure efficient execution of parallel jobs on multiprocessor systems. In this paper, we s...
Hongyang Sun, Yangjie Cao, Wen-Jing Hsu