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117
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IPPS
2007
IEEE
15 years 10 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
102
Voted
ISCAS
2007
IEEE
105views Hardware» more  ISCAS 2007»
15 years 10 months ago
Parallel current-steering D/A Converters for Flexibility and Smartness
—This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of avai...
Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe,...
ISQED
2007
IEEE
148views Hardware» more  ISQED 2007»
15 years 10 months ago
On Accelerating Soft-Error Detection by Targeted Pattern Generation
Soft error due to ionizing radiation is emerging as a major concern for future technologies. The measurement unit for failures due to soft errors is called Failure-In-Time (FIT) t...
Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu
IWPC
2007
IEEE
15 years 10 months ago
Recovering Workflows from Multi Tiered E-commerce Systems
A workflow is a computerized specification of a business process. A workflow describes how tasks are executed and ordered following business policies. E-commerce systems implement...
Maokeng Hung, Ying Zou
RTSS
2007
IEEE
15 years 10 months ago
Robust Priority Assignment for Fixed Priority Real-Time Systems
This paper focuses on priority assignment for realtime systems using fixed priority scheduling. It introduces and defines the concept of a “robust” priority ordering: the most...
Robert I. Davis, Alan Burns