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SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
15 years 10 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
IPPS
2007
IEEE
15 years 10 months ago
Improving MPI Independent Write Performance Using A Two-Stage Write-Behind Buffering Method
Many large-scale production applications often have very long executions times and require periodic data checkpoints in order to save the state of the computation for program rest...
Wei-keng Liao, Avery Ching, Kenin Coloma, Alok N. ...
IROS
2006
IEEE
142views Robotics» more  IROS 2006»
15 years 10 months ago
Experience Based Imitation Using RNNPB
—Robot imitation is a useful and promising alternative to robot programming. Robot imitation involves two crucial issues. The first is how a robot can imitate a human whose phys...
Ryunosuke Yokoya, Tetsuya Ogata, Jun Tani, Kazunor...
CCS
2004
ACM
15 years 9 months ago
Lessons learned using alloy to formally specify MLS-PCA trusted security architecture
In order to solve future Multi Level Security (MLS) problems, we have developed a solution based on the DARPA Polymorphous Computing Architecture (PCA). MLS-PCA uses a novel distr...
Brant Hashii
AR
2007
99views more  AR 2007»
15 years 4 months ago
Experience-based imitation using RNNPB
Abstract— Robot imitation is a useful and promising alternative to robot programming. Robot imitation involves two crucial issues. The first is how a robot can imitate a human w...
Ryunosuke Yokoya, Tetsuya Ogata, Jun Tani, Kazunor...