10935 search results - page 1933 / 2187 » Neural Programming Language |
211
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ASPLOS
2009
ACM
16 years 2 months ago
2009
ACM
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
219
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ASPLOS
2009
ACM
16 years 2 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...
241
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ASPLOS
2009
ACM
16 years 2 months ago
2009
ACM
The wide availability of commodity graphics processors has made real-time graphics an intrinsic component of the human/computer interface. These graphics cores accelerate the z-bu...
115
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CCS
2009
ACM
16 years 2 months ago
2009
ACM
Inlined Reference Monitor (IRM) is an established enforcement mechanism for history-based access control policies. IRM enforcement injects monitoring code into the binary of an un...
141
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POPL
2010
ACM
15 years 11 months ago
2010
ACM
Despite years of work on retargetable compilers, creating a good, reliable back end for an optimizing compiler still entails a lot of hard work. Moreover, a critical component of ...