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IPPS
2000
IEEE
15 years 10 months ago
A Novel Superscalar Architecture for Fast DCT Implementation
This paper presents a new superscalar architecture for fast discrete cosine transform (DCT). Comparing with the general SIMD architecture, it speeds up the DCT computation by a fac...
Zhang Yong, Min Zhang
HPCN
1998
Springer
15 years 10 months ago
Dynamically Trace Scheduled VLIW Architectures
This paper presents a new architecture organisation, the dynamically trace scheduled VLIW (DTSVLIW), that can be used to implement machines that execute the code of current RISC o...
Alberto Ferreira de Souza, Peter Rounce
AAAI
2007
15 years 8 months ago
On the Prospects for Building a Working Model of the Visual Cortex
Human visual capability has remained largely beyond the reach of engineered systems despite intensive study and considerable progress in problem understanding, algorithms and comp...
Thomas Dean, Glenn Carroll, Richard Washington
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
16 years 2 days ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek
SSPR
1998
Springer
15 years 10 months ago
Network-Based Recognition of Architectural Symbols
Abstract. In this paper, we propose a method for recognizing architectural symbols. The method is based on the description of the model through a set of constraints on geometrical ...
Christian Ah-Soon, Karl Tombre