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ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
16 years 2 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
SOSP
2001
ACM
16 years 2 months ago
Mesh Based Content Routing using XML
We have developed a new approach for reliably multicasting timecritical data to heterogeneous clients over mesh-based overlay networks. To facilitate intelligent content pruning, ...
Alex C. Snoeren, Kenneth Conley, David K. Gifford
SOSP
2003
ACM
16 years 2 months ago
Capriccio: scalable threads for internet services
This paper presents Capriccio, a scalable thread package for use with high-concurrency servers. While recent work has advocated event-based systems, we believe that threadbased sy...
J. Robert von Behren, Jeremy Condit, Feng Zhou, Ge...
SOSP
2007
ACM
16 years 2 months ago
Bouncer: securing software by blocking bad input
Attackers exploit software vulnerabilities to control or crash programs. Bouncer uses existing software instrumentation techniques to detect attacks and it generates filters auto...
Manuel Costa, Miguel Castro, Lidong Zhou, Lintao Z...
CVPR
2010
IEEE
16 years 1 months ago
Optimizing One-Shot Recognition with Micro-Set Learning
For object category recognition to scale beyond a small number of classes, it is important that algorithms be able to learn from a small amount of labeled data per additional clas...
Kevin Tang, Marshall Tappen, Rahul Sukthankar, Chr...
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