Sciweavers

357 search results - page 4 / 72
» No new wires
Sort
View
DAC
1996
ACM
15 years 4 months ago
Post-Layout Optimization for Deep Submicron Design
To reduce the number of synthesis and layout iterations, we present a new delay optimization technique, which inserts buers based on back-annotated detailed routing information. D...
Koichi Sato, Masamichi Kawarabayashi, Hideyuki Emu...
ICCAD
2007
IEEE
108views Hardware» more  ICCAD 2007»
15 years 9 months ago
Novel wire density driven full-chip routing for CMP variation control
— As nanometer technology advances, the post-CMP dielectric thickness variation control becomes crucial for manufacturing closure. To improve CMP quality, dummy feature filling ...
Huang-Yu Chen, Szu-Jui Chou, Sheng-Lung Wang, Yao-...
ICCAD
2003
IEEE
114views Hardware» more  ICCAD 2003»
15 years 9 months ago
A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms also grows. In this work we introduce Traffic, a new method for creating wire- a...
Peter G. Sassone, Sung Kyu Lim
89
Voted
ETFA
2005
IEEE
15 years 5 months ago
Quantitative evaluation of the safety of X-by-Wire architecture subject to EMI perturbations
The X-by-Wire systems in cars can only be accepted if they provide at least the same dependability than the traditional ones. In this paper we propose a new approach to evaluate t...
C. Wilwert, Françoise Simonot-Lion, Yeqiong...
LCN
2008
IEEE
15 years 6 months ago
IPclip: An architecture to restore Trust-by-Wire in packet-switched networks
—During the last decades, the Internet has steadily developed into a mass medium. The target group radically changed compared to, e.g., the 90s. Because virtually everyone has ac...
Harald Widiger, Stephan Kubisch, Peter Danielis, J...