129 search results - page 8 / 26 » Novel Design Methodology for High-Performance XOR-XNOR Circu... |
DAC
1999
ACM
15 years 10 months ago
1999
ACM
We propose a new VLSI layout methodology which addresses the main problems faced in Deep Sub-Micron (DSM) integrated circuit design. Our layout "fabric" scheme eliminate...
DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
Circuit marginality failures in high performance VLSI circuits are projected to increase due to shrinking process geometries and high frequency design techniques. Capacitive cross...
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Voted
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
DAC
1996
ACM
15 years 1 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
VLSID
2005
IEEE
15 years 10 months ago
2005
IEEE
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...