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IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
15 years 7 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne
ISVLSI
2006
IEEE
115views VLSI» more  ISVLSI 2006»
15 years 7 months ago
Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems
This paper investigates the performance and power dissipation of Globally Asynchronous Locally Synchronous (GALS) multi-processor systems. We show that communication loops are a s...
Zhiyi Yu, Bevan M. Baas
WIOPT
2006
IEEE
15 years 7 months ago
A general probabilistic model for improving key assignment in wireless networks
Abstract— We study the problem of establishing secure communication channels in resource-constrained wireless networks using key predistribution. Pairwise communication channels ...
Patrick Tague, Radha Poovendran
INFOSCALE
2006
ACM
15 years 7 months ago
A library of constructive skeletons for sequential style of parallel programming
Abstract— With the increasing popularity of parallel programming environments such as PC clusters, more and more sequential programmers, with little knowledge about parallel arch...
Kiminori Matsuzaki, Hideya Iwasaki, Kento Emoto, Z...
SIGCSE
2006
ACM
139views Education» more  SIGCSE 2006»
15 years 7 months ago
Closing the loop on test creation: a question assessment mechanism for instructors
New accreditation requirements focus on education as a “continuous improvement process.” The most important part of such a process is that information gets fed back into the s...
Titus Winters, Tom Payne