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ISPAN
2000
IEEE
15 years 10 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
PPOPP
1999
ACM
15 years 10 months ago
Automatic Parallelization of Divide and Conquer Algorithms
Divide and conquer algorithms are a good match for modern parallel machines: they tend to have large amounts of inherent parallelism and they work well with caches and deep memory...
Radu Rugina, Martin C. Rinard
HPCA
1999
IEEE
15 years 10 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
168
Voted
IEEEPACT
1999
IEEE
15 years 10 months ago
Cameron: High level Language Compilation for Reconfigurable Systems
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm...
158
Voted
IPPS
1999
IEEE
15 years 10 months ago
MPIJAVA: An Object-Oriented JAVA Interface to MPI
Abstract. A basic prerequisite for parallel programming is a good communication API. The recent interest in using Java for scienti c and engineering application has led to several ...
Mark Baker, Bryan Carpenter, Geoffrey Fox, Sung Ho...