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IPPS
1998
IEEE
15 years 7 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 7 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
SSS
2009
Springer
15 years 10 months ago
Visiting Gafni's Reduction Land: From the BG Simulation to the Extended BG Simulation
: The Borowsky-Gafni (BG) simulation algorithm is a powerful tool that allows a set of t + 1 asynchronous sequential processes to wait-free simulate (i.e., despite the crash of up ...
Damien Imbs, Michel Raynal
JMLR
2002
125views more  JMLR 2002»
15 years 3 months ago
Lyapunov Design for Safe Reinforcement Learning
Lyapunov design methods are used widely in control engineering to design controllers that achieve qualitative objectives, such as stabilizing a system or maintaining a system'...
Theodore J. Perkins, Andrew G. Barto
126
Voted
ICCV
2009
IEEE
15 years 1 months ago
Storyboard sketches for Content Based Video Retrieval
We present a novel Content Based Video Retrieval (CBVR) system, driven by free-hand sketch queries depicting both objects and their movement (via dynamic cues; streak-lines and ar...
John P. Collomosse, Graham McNeill, Yu Qian