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CGO
2004
IEEE
15 years 8 months ago
Static Identification of Delinquent Loads
The effective use of processor caches is crucial to the performance of applications. It has been shown that cache misses are not evenly distributed throughout a program. In applic...
Vlad-Mihai Panait, Amit Sasturkar, Weng-Fai Wong
CGO
2004
IEEE
15 years 8 months ago
Custom Data Layout for Memory Parallelism
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
Byoungro So, Mary W. Hall, Heidi E. Ziegler
CGO
2004
IEEE
15 years 8 months ago
A Compiler Scheme for Reusing Intermediate Computation Results
Recent research has shown that programs often exhibit value locality. Such locality occurs when a code segment, although executed repeatedly in the program, takes only a small num...
Yonghua Ding, Zhiyuan Li
CGO
2004
IEEE
15 years 8 months ago
VHC: Quickly Building an Optimizer for Complex Embedded Architectures
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
Michael Dupré, Nathalie Drach, Olivier Tema...
CGO
2004
IEEE
15 years 8 months ago
Exposing Memory Access Regularities Using Object-Relative Memory Profiling
Memory profiling is the process of characterizing a program's memory behavior by observing and recording its response to specific input sets. Relevant aspects of the program&...
Qiang Wu, Artem Pyatakov, Alexey Spiridonov, Easwa...
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