322 search results - page 11 / 65 » On Design and Application Mapping of a Network-on-Chip(NoC) ... |
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
126
click to vote
ASAP
2006
IEEE
15 years 5 months ago
2006
IEEE
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
ASPLOS
2012
ACM
13 years 7 months ago
2012
ACM
Disciplined approximate programming lets programmers declare which parts of a program can be computed approximately and consequently at a lower energy cost. The compiler proves st...
105
click to vote
DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
106
click to vote
FPL
2000
Springer
15 years 3 months ago
2000
Springer
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...