1529 search results - page 40 / 306 » On Timing Analysis of Combinational Circuits |
FGR
2004
IEEE
15 years 1 months ago
2004
IEEE
We explore a novel motion feature as the appropriate basis for classifying or describing a number of fine motor human activities.Ourapproach not only estimates motion directions a...
ASYNC
2007
IEEE
15 years 4 months ago
2007
IEEE
On-chip high-bandwidth sampling circuits supplement traditional test and debug techniques by non-invasively probing analog voltages for off-chip measurement. Existing circuits rel...
EURODAC
1990
IEEE
15 years 1 months ago
1990
IEEE
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
ASPDAC
2009
ACM
15 years 4 months ago
2009
ACM
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...