1529 search results - page 68 / 306 » On Timing Analysis of Combinational Circuits |
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DAC
1997
ACM
15 years 2 months ago
1997
ACM
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
ICCAD
1998
IEEE
15 years 2 months ago
1998
IEEE
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
CASES
2008
ACM
14 years 11 months ago
2008
ACM
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
LREC
2010
14 years 11 months ago
2010
The idea that dictionaries are a good source for (computational) information has been around for a long while, and the extraction of taxonomic information from them is something t...
CF
2007
ACM
15 years 1 months ago
2007
ACM
We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we in...