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» On Timing Analysis of Combinational Circuits
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HCI
2009
14 years 7 months ago
A Comparison of Artifact Reduction Methods for Real-Time Analysis of fNIRS Data
Due to its convenient, low physical restraint, and electric noise tolerant features, functional near-infrared spectroscopy (fNIRS) is expected to be a useful tool in monitoring use...
Takayuki Nozawa, Toshiyuki Kondo
ICMCS
2005
IEEE
109views Multimedia» more  ICMCS 2005»
15 years 3 months ago
Real-Time and Distributed AV Content Analysis System for Consumer Electronics Networks
The ever-increasing complexity of generic MultimediaContent-Analysis-based (MCA) solutions, their processing power demanding nature and the need to prototype and assess solutions ...
Jan Nesvadba, Pedro Fonseca, Alexander Sinitsyn, F...
DATE
2008
IEEE
125views Hardware» more  DATE 2008»
15 years 4 months ago
Current source based standard cell model for accurate signal integrity and timing analysis
— The inductance and coupling effects in interconnects and non-linear receiver loads has resulted in complex input signals and output loads for gates in the modern deep submicron...
Amit Goel, Sarma B. K. Vrudhula
IPPS
2007
IEEE
15 years 4 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
15 years 2 months ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...