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» On Tool Integration in High-Performance FPGA Design Flows
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DAC
2006
ACM
16 years 22 days ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...
81
Voted
DAC
2008
ACM
16 years 23 days ago
Enhancing timing-driven FPGA placement for pipelined netlists
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
Kenneth Eguro, Scott Hauck
RSP
2003
IEEE
149views Control Systems» more  RSP 2003»
15 years 5 months ago
Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...
108
Voted
DAGSTUHL
2006
15 years 1 months ago
Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
Douglas L. Maskell, Timothy F. Oliver
WSC
2000
15 years 1 months ago
Cluster tool simulation assists the system design
Designing semiconductor cluster tool systems is a complicated task due to the nature of automatic operations and various configurations of modules and task response priorities of ...
Sarayuth Poolsup, Salil Deshpande