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» On efficient balanced codes
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CSSE
2008
IEEE
15 years 10 months ago
Embedding in Two Least Significant Bits with Wet Paper Coding
In this paper, we present three embedding schemes for extensions of least significant bit overwriting to both of the two lowest bit planes in digital images. Our approaches are in...
Xin Liao, Qiao-Yan Wen
ISCAS
2005
IEEE
178views Hardware» more  ISCAS 2005»
15 years 9 months ago
Lifting-based multi-view image coding
—A number of lifting-based video coding schemes have been recently proposed for scalable video coding. In this paper, we present a novel multi-view image codec based on a wavelet...
Nantheera Anantrasirichai, Cedric Nishan Canagaraj...
ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
15 years 8 months ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan
DFT
2004
IEEE
94views VLSI» more  DFT 2004»
15 years 7 months ago
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes
This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional...
Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman ...
SPIN
2000
Springer
15 years 7 months ago
Logic Verification of ANSI-C Code with SPIN
We describe a tool, called AX, that can be used in combination with the model checker SPIN to efficiently verify logical properties of distributed software systems implemented in A...
Gerard J. Holzmann