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» On formal models for social verification
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DAC
2006
ACM
15 years 3 months ago
Use of C/C++ models for architecture exploration and verification of DSPs
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
David Brier, Raj S. Mitra
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
15 years 3 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng
PPOPP
2009
ACM
15 years 10 months ago
Formal verification of practical MPI programs
This paper considers the problem of formal verification of MPI programs operating under a fixed test harness for safety properties without building verification models. In our app...
Anh Vo, Sarvani S. Vakkalanka, Michael Delisi, Gan...
ACSC
2004
IEEE
15 years 1 months ago
Verification of the Futurebus+ Cache Coherence protocol: A case study in model checking
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
Kylie Williams, Robert Esser
JSA
2008
131views more  JSA 2008»
14 years 9 months ago
Formal verification of ASMs using MDGs
We present a framework for the formal verification of abstract state machine (ASM) designs using the multiway decision graphs (MDG) tool. ASM is a state based language for describ...
Amjad Gawanmeh, Sofiène Tahar, Kirsten Wint...