759 search results - page 11 / 152 » On formal models for social verification |
111
Voted
DAC
2006
ACM
15 years 7 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
106
click to vote
DATE
2006
IEEE
15 years 7 months ago
2006
IEEE
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
149
click to vote
PPOPP
2009
ACM
16 years 2 months ago
2009
ACM
This paper considers the problem of formal verification of MPI programs operating under a fixed test harness for safety properties without building verification models. In our app...
131
click to vote
ACSC
2004
IEEE
15 years 5 months ago
2004
IEEE
This paper presents a case study for automatic verification using the Communicating Sequential Processes formalism. The case study concerns the Futurebus+ cache coherency standard...
139
click to vote
JSA
2008
15 years 1 months ago
2008
We present a framework for the formal verification of abstract state machine (ASM) designs using the multiway decision graphs (MDG) tool. ASM is a state based language for describ...