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» On reducing load store latencies of cache accesses
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ASPLOS
1992
ACM
15 years 3 months ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
HPCA
2008
IEEE
16 years 5 days ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
ICDCSW
2002
IEEE
15 years 4 months ago
Class-Based Delta-Encoding: A Scalable Scheme for Caching Dynamic Web Content
Abstract—Caching static HTTP traffic in proxy-caches has reduced bandwidth consumption and download latency. However, web-caching performance is hard to increase further due to ...
Konstantinos Psounis
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
14 years 10 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
DEXAW
2000
IEEE
160views Database» more  DEXAW 2000»
15 years 4 months ago
An Adaptive AVI-Based Cache Invalidation Scheme for Mobile Computing Systems
In a mobile computing system, caching data items at the mobile clients is important to reduce the data access delay in a unreliable and low bandwidth mobile network. However, effi...
Joe Chun-Hung Yuen, Edward Chan, Kam-yiu Lam, Hei-...