10718 search results - page 121 / 2144 » On the Circuit Implementation Problem |
135
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VLSID
2002
IEEE
16 years 4 months ago
2002
IEEE
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
115
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FDL
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract. The paper proposes a simulation-based method for validating analog and mixed-signal circuits, using the hybrid systems methodology. This method builds upon RRT (Rapidly-e...
108
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IOLTS
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper describes a highly reliable digital circuit design method based on totally self checking blocks implemented in FPGAs. The bases of the self checking blocks are parity p...
137
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GLVLSI
2005
IEEE
15 years 9 months ago
2005
IEEE
Switching model captures the data-driven uncertainty in logic circuits in a comprehensive probabilistic framework. Switching is a critical factor that influences dynamic, active ...
144
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ISMVL
1999
IEEE
15 years 8 months ago
1999
IEEE
We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...