10718 search results - page 194 / 2144 » On the Circuit Implementation Problem |
155
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ICCAD
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper describes a polynomial time algorithm for min-area retiming for edge-triggered circuits to handle both setup and hold constraints. Given a circuit G and a target clock ...
125
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BIRD
2008
Springer
15 years 6 months ago
2008
Springer
The swap matching problem consists if finding a pattern in a text, while allowing for transpositions in the pattern. A new approach using a graph-theoretic model was presented in [...
115
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ICCD
2004
IEEE
16 years 1 months ago
2004
IEEE
— In this paper, we approach the gate sizing problem in VLSI circuits in the context of increasing variability of process and circuit parameters as technology scales into the nan...
113
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DDECS
2007
IEEE
15 years 10 months ago
2007
IEEE
— Recently, there is a renewed interest in Automatic Test Pattern Generation (ATPG) based on Boolean Satisfiability (SAT). This results from the availability of very powerful SA...
140
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ISCAS
2005
IEEE
15 years 10 months ago
2005
IEEE
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...