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ISCAS
1999
IEEE
114views Hardware» more  ISCAS 1999»
15 years 8 months ago
Auditory cortical spectral shape analysis in analog VLSI
An analog VLSI circuit used to model spectral shape analysis in the central auditory system is presented. Like the receptive fields of visual cortical neurons, the spectral respon...
M. Erturk, David J. Klein, Shihab A. Shamma
ICCAD
1997
IEEE
94views Hardware» more  ICCAD 1997»
15 years 8 months ago
PRIMA: passive reduced-order interconnect macromodeling algorithm
— This paper describes an algorithm for generating provably passive reduced-order N-port models for RLC interconnect circuits. It is demonstrated that, in addition to macromodel ...
Altan Odabasioglu, Mustafa Celik, Lawrence T. Pile...
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
15 years 8 months ago
Methods to reduce test application time for accumulator-based self-test
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
Albrecht P. Stroele, Frank Mayer
DAC
1996
ACM
15 years 8 months ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng
DAC
1994
ACM
15 years 8 months ago
Functional Test Generation for FSMs by Fault Extraction
Recent results indicate that functional test pattern generation (TPG) techniques may provide better defect coverages than do traditional logic-level techniques. Functional TPG alg...
Bapiraju Vinnakota, Jason Andrews