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» On the Circuit Implementation Problem
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166
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ISPD
1997
ACM
186views Hardware» more  ISPD 1997»
15 years 7 months ago
EWA: exact wiring-sizing algorithm
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...
Rony Kay, Gennady Bucheuv, Lawrence T. Pileggi
144
Voted
CRYPTO
2012
Springer
234views Cryptology» more  CRYPTO 2012»
13 years 6 months ago
Homomorphic Evaluation of the AES Circuit
We describe a working implementation of leveled homomorphic encryption (without bootstrapping) that can evaluate the AES-128 circuit in three different ways. One variant takes und...
Craig Gentry, Shai Halevi, Nigel P. Smart
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
16 years 3 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
ISCAS
2008
IEEE
121views Hardware» more  ISCAS 2008»
15 years 10 months ago
A novel flash analog-to-digital converter
—In this paper a new ADC architecture of flash type is proposed. This proposed N-bit flash ADC replaces the (2N -1)-toN encoder with two (2N/2 -1)-to-(N/2) encoders to accomplish...
Chia-Nan Yeh, Yen-Tai Lai
IPPS
2007
IEEE
15 years 9 months ago
Speedup using Flowpaths for a Finite Difference Solution of a 3D Parabolic PDE
Partial differential equations (PDEs) are used to model physical phenomena and then appropriate convergent numerical algorithms are employed to solve them and create computer simu...
Darrin M. Hanna, Anna M. Spagnuolo, Michael DuChen...