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» On the Circuit Implementation Problem
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129
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TAP
2010
Springer
102views Hardware» more  TAP 2010»
15 years 8 months ago
Generating High-Quality Tests for Boolean Circuits by Treating Tests as Proof Encoding
Abstract. We consider the problem of test generation for Boolean combinational circuits. We use a novel approach based on the idea of treating tests as a proof encoding rather than...
Eugene Goldberg, Panagiotis Manolios
123
Voted
ICCAD
1997
IEEE
131views Hardware» more  ICCAD 1997»
15 years 7 months ago
COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits
Maximum instantaneous power in VLSI circuits has a great impact on circuit's reliability and the design of power and ground lines. To synthesizehighlyreliablesystems,accurate...
Chuan-Yu Wang, Kaushik Roy
128
Voted
ICCAD
1995
IEEE
136views Hardware» more  ICCAD 1995»
15 years 7 months ago
A controller-based design-for-testability technique for controller-data path circuits
This paper investigates the effect of the controller on the testability of sequential circuits composed of controllers and data paths. It is shown that even when both the controll...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
116
Voted
AICCSA
2006
IEEE
107views Hardware» more  AICCSA 2006»
15 years 5 months ago
Exciting Stuck-Open faults in CMOS Circuits Using ILP Techniques
To excite a stuck-open fault in a CMOS combinational circuit, it is only necessary that the output of the gate containing the fault takes on opposite values during the application...
Fadi A. Aloul, Assim Sagahyroon, Bashar Al Rawi
121
Voted
DFT
2006
IEEE
122views VLSI» more  DFT 2006»
15 years 7 months ago
Efficient and Robust Delay-Insensitive QCA (Quantum-Dot Cellular Automata) Design
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
Minsu Choi, Myungsu Choi, Zachary D. Patitz, Nohpi...