Sciweavers

1795 search results - page 255 / 359
» On the Complexity of Circuit Satisfiability
Sort
View
109
Voted
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 6 months ago
Minimization of the expected path length in BDDs based on local changes
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
Rüdiger Ebendt, Wolfgang Günther, Rolf D...
ISPD
2004
ACM
171views Hardware» more  ISPD 2004»
15 years 6 months ago
Structured ASIC, evolution or revolution?
This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed int...
Kun-Cheng Wu, Yu-Wen Tsai
FMCAD
2004
Springer
15 years 6 months ago
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
This paper describes a new method that is useful in combinational equivalence checking with very challenging industrial designs. The method does not build a miter; instead it build...
In-Ho Moon, Carl Pixley
FOCS
2003
IEEE
15 years 6 months ago
Bounded-Concurrent Secure Two-Party Computation in a Constant Number of Rounds
We consider the problem of constructing a general protocol for secure two-party computation in a way that preserves security under concurrent composition. In our treatment, we foc...
Rafael Pass, Alon Rosen
GLVLSI
2003
IEEE
140views VLSI» more  GLVLSI 2003»
15 years 6 months ago
Exploiting multiple functionality for nano-scale reconfigurable systems
It is likely that it will become increasingly difficult to manufacture the complex, heterogeneous logic structures that characterise current reconfigurable logic systems. As a res...
Paul Beckett