: We have shown in our past work that the standard configuration of Time-Triggered (TT) Ethernet unifies real-time and non-real-time traffic within a single coherent communication ...
Astrit Ademaj, Hermann Kopetz, Petr Grillinger, Kl...
—Mounting concerns over variability, defects and noise motivate a new approach for digital circuitry: stochastic logic, that is to say, logic that operates on probabilistic signa...
Weikang Qian, Xin Li, Marc D. Riedel, Kia Bazargan...
Background: Previous research has provided evidence that a combination of static code metrics and software history metrics can be used to predict with surprising success which fil...
Thomas J. Ostrand, Elaine J. Weyuker, Robert M. Be...
ing Abstraction to Improve Fault Tolerance MIGUEL CASTRO Microsoft Research and RODRIGO RODRIGUES and BARBARA LISKOV MIT Laboratory for Computer Science Software errors are a major...
This paper describes a highly reliable digital circuit design method based on totally self checking blocks implemented in FPGAs. The bases of the self checking blocks are parity p...